The 74AUP1G02 is a NOR gate having two inputs. The circuit is tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V because of the Schmitt-trigger action at all ...
This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...
The 74ABT00 is a quad 2-input NAND gate. This device is fully specified for partial power down applications using Ioff. The Ioff circuitry disables the output, preventing the potentially damaging ...
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